1. Field of the Invention
The present invention relates to a circuit and method for determining a time of arrival of a signal event. More particularly, the present invention involves a circuit for estimating an arrival time of a signal pulse edge by calculating a plurality of intermediate amplitude values between a first signal sample and a second signal sample and interpolating the arrival time by comparing each of the plurality of intermediate values to a threshold value.
2. Description of Prior Art
Radio frequency (RF) signal receivers and other receivers use analog-to-digital converters (ADCs) to capture signal samples for processing. Such ADCs are typically driven by a receiver system clock, and thus capture samples at a rate equal to the frequency of the system clock. A circuit that determines a time of arrival (TOA) of a signal event, such as a rising edge of the signal, relies on the samples generated by the ADC and is thus limited in operation to the system clock rate.
By way of example, and referring to FIG. 1, a receiver with an 80 MHz system clock captures consecutive signal samples N and N+1, wherein the elapsed time T between samples N and N+1 is equal to the period of the system clock, or 12.5 ns. Therefore the TOA resolution is about 12.5 ns. It will be appreciated that if the first sample to indicate occurrence of the event is N+1, the receiver will assign an arrival time equal to N+1 even though the event could have occurred at any time between N and N+1. Thus, the TOA error could be nearly 12.5 ns.
One method of increasing the resolution of the TOA involves the use of an additional analog-to-digital converter (ADC) sampling the RF signal at a higher frequency than the system clock to generate one or more amplitude samples during the time T between samples N and N+1. With this method, the slower ADC running at the system clock speed captures samples used to detect when the signal has exceeded a threshold value to trigger a circuit to compare the most recent values generated by the fast ADC to the threshold value, thus more accurately determining the arrival time of the signal event.
This method suffers from various problems and limitations. First, the faster ADC requires dedicated analog-to-digital conversion circuitry, an additional clock, and storage elements (for storing recent values) among other things, all of which contribute to the size and power consumption of the overall circuit. Second, the additional clock must run the faster ADC at a higher frequency than the system clock and be synchronized with the system clock, adding to the complexity of the overall circuit.
Accordingly, there is a need for an improved TOA detection method that does not suffer from the problems and limitations of the prior art.